There is a growing need of handling a very large volume of data by computer in a short time with the progress of multimedia in recent years. For example, there are cases where it becomes necessary to make input & output of a large volume of data in a file server, etc. or cases where chronologically continuous analogue signals such as image, etc. are digitized and that data stream is recorded on a recording medium such as hard disc, etc. (hereinafter the explanation will be made by taking hard disc as example of recording medium) or reproduced from the hard disc. Especially when handling images, it is requested that the data be recorded or reproduced at high speed and seamlessly, and various kinds of proposal are made from this viewpoint.
FIG. 18 is a conceptual drawing showing an example of construction of a conventional data recorder in computer. A host adaptor 2 is connected to the host bus 1 of the computer 8. The host adaptor 2 developed in recent years is adapted to bus master DMA transfer capable of transfer at higher speed and, in case of occurrence of any command for recording and readout to the hard disc, a controller 6 inside the host adaptor 2 obtains the monopoly right of the host bus 1, and the controller 6 transfers any desired data from the memory 5 to a buffer memory 7 incorporated in the host adaptor 2 through the host bus 1. In this way, the data written in the buffer memory 7 is recorded in the hard disc 4 through the transfer bus 3. Next, when reading out the data, the controller 6 transfers the data in the hard disc 4 to the buffer memory 7 through the transfer bus 3, and then the controller 6 obtains the monopoly right of the host bus and transfers the contents of the buffer memory 7 to a desired area of the memory 5.
FIG. 19 shows another conventional example of recording and readout in hard disc. As disclosed in Japanese patent application No. 5-265661 for example, the recording data is dispersed for recording on a plural number of hard discs, to enable processing at higher speed.
The host adaptor 2 connected to the host bus 1 of the computer 8 is provided with one or a plural number of transfer buses 3, and a plural number of hard discs 4(1).about.4(4) are connected to the transfer bus 3. However, the number of hard discs 4 indicated in FIG. 19 is only an example, and the number of hard discs connected to each transfer bus 3 may be decided as desired.
In case of occurrence of any command for recording data, the controller 6 incorporated in the host adaptor 2 obtains the monopoly right of the host bus 1, and the controller 6 transfers any desired data from the memory 5 to the buffer memory 7 incorporated in the host adaptor 2 through the host bus 1. Next, the data thus written in the buffer memory 7 is dispersed by the controllers 6(1), 6(2) for recording on the respective hard discs 4(1).about.4(4). The role of the controllers 6(1), 6(2) may well be played by the controller 6 as a matter of course. In this case, the recording time is shortened because the recording on the respective hard discs 4(1).about.4(4) is made by overlapping with one another in time.
However, the above construction, which is realized in such a way that the controller 6 inside the host adaptor 2 temporarily stores the recording data in the buffer memory 7 as cache memory in the adaptor 2 through the host bus 1 and transfers that data to the respective hard discs 4 through the transfer bus 3 of the host adaptor 2, presents a problem that the processing for transferring the data from the memory 5 on the computer to the buffer memory 7 on the host adaptor 2 and the processing for transferring from the buffer memory 7 to the hard disc 4 cannot be handled in parallel.
Moreover, it also has a problem that, when making a bus master DMA transfer on the host bus 1 of the computer, time for arbitration control is required for one device (controller 6 in this case) to secure the monopoly right of the hose bus and, because the time of monopoly by one device is limited, the high-speed transfer capacity of the host bus is not fully utilized
At present, by comparison between the host bus 1 in the computer and the transfer bus of the host adaptor 2, the host bus 1 in the computer can apparently transfer data at higher speed. To give an example, since the transfer speed of SCSI bus, which is the representative host adaptor, is 40 Mbytes/sec with the Ultra Wide standard, which is the highest transfer speed, against 133 Mbytes/sec of the PCI (Peripheral Component Interconnect) bus, which is the representative host bus of computer, it is apparent that the host bus can make the transfer at higher speed.
The object of the present invention is to provide a data recorder capable of enabling data recording and readout at higher speed to record and read out high-bit-rate data stream at high speed by assigning the idle time of this host bus to data transfer as much as possible and by performing the processing for transferring the data from the memory on the computer to the buffer memory on the host adaptor and the processing for transferring from the buffer memory to the hard disc in parallel, and a method of access to the data recorder.
By the way, editing of images and sounds, etc. is made on the computer by connecting an apparatus for either recording or reproducing image and sound data (VTR, video camera, hard disc, optical disc, etc.) to a computer through a special interface or network and transmitting data to the computer. For example, the recording & reproduction systems indicated in Japanese patent applications Nos. 8-57659, 8-176934, etc. are intended for such editing.
When transferring data from said recording & reproduction system to a computer, it is necessary to convert signals of a prescribed form into signals of a form conformable to the data bus used for the system (signals of PCI form, for example). For that reason, all of said conventional examples are designed to make said conversion of data form on the computer and to also perform other necessary operations on the computer.
However, in the case where said data conversion and editing are fully performed on the computer as stated above, the size of said data transfer depends on the construction of hardware constituting the computer, as well as the operating system (OS), device driver, application software, etc. On the other hand, said component elements on the computer chronologically change and, therefore, the data size available for transfer within a specific period of time also changes.
For that reason, there is a problem that even a slight change (increase of the number of display units used, for example) in the system construction such as VGA (Video Graphics Array) extension board or hard disc, etc. makes high-speed data transfer in the internal data bus impossible and, as a result, leads to such phenomena as getting out of frame of reproduced image, etc. or deteriorated transmission efficiency allowing transmission only in a data size smaller than the normally available data size.
Moreover, there is another problem that, when performing editing while transmitting data at the same time, the transmitted data may be lost because of the load on the CPU.
Another object of the present invention is to provide a data transmission method and apparatus capable of efficiently performing data transfer from recording & reproduction system to computer or from computer to recording & reproduction system, without depending on the system construction, and to also provide a highly reliable data transmission method and apparatus.